Input Output organisation

<h1><span class="Apple-style-span"><strong>Accessing I/O Devices:-</strong></span></h1><br/><ul><br/> <li>Most modern computers use single bus arrangement for connecting I/O devices to CPU & Memory.</li><br/> <li>The bus enables all the devices connected to it to exchange information.</li><br/> <li>Bus consists of 3 set of lines : Address, Data & Control Lines.</li><br/> <li>Processor places a particular address (unique for an I/O Device) on address lines.</li><br/> <li>Device which recognizes this address responds to the commands issued on the Control lines.</li><br/> <li>Processor requests for either Read/Write.</li><br/> <li>The data will be placed on Data lines</li><br/></ul><br/><h1><span class="Apple-style-span"><strong>I/O INTERFACE:-</strong></span><strong><a href="http://k-developers.com/wp-content/uploads/2015/12/iointerface.png"><img alt="iointerface" class="size-full wp-image-100 aligncenter" height="377" src="http://k-developers.com/wp-content/uploads/2015/12/iointerface.png" width="851" /></a></strong></h1><br/><div>1) It is a special hardware used to connect the I/O device to the bus , i.e, I/O interface.</div><br/><div>2)The I/O module has following sections:-</div><br/><ul><br/> <li><strong>Address decoder:-</strong> It enables the device to recognize its address when this address appears on the address lines.</li><br/> <li><strong>Data register:-</strong> The data register holds the data being transferred to or from the processor.</li><br/></ul><br/><div>3) The status register contains information relevant to the operation of the I/O module.</div><br/><div>* Both the data and status register are connected to the data bus.</div><br/><div><a href="http://k-developers.com/wp-content/uploads/2015/12/iomodule.png"><img alt="iomodule" class="size-full wp-image-101 aligncenter" height="331" src="http://k-developers.com/wp-content/uploads/2015/12/iomodule.png" width="692" /></a></div><br/><div></div><br/><h2><strong>MODES OF DATA TRANSFER:-</strong></h2><br/><div><strong>1.Programmed I/O Mode:-</strong></div><br/><div>1) In programmed I/O mode data are exchanged between the processor and the I/O module.  When a processor is executing a program and encounters an instruction relating to I/O, it executes that instruction by issuing a command to that appropriate I/O module. With programmed I/O the I/O module will perform the requested action and then set the appropriate bit in the I/O status register.</div><br/><div>2) The I/O module takes no further action to alert the processor (it doesn't interrupt the processor).</div><br/><div>3) The I/O commands issued by the processor to the I/O module</div><br/><ul><br/> <li>Test</li><br/> <li>Control</li><br/> <li>Read</li><br/> <li>Write</li><br/></ul><br/><div><strong>2.Memory Mapped I/O:-</strong></div><br/><div>1) There is a single address space for memory location and I/O devices.( the address space is shared)</div><br/><div>2) With memory mapped I/O a single read line a single write line are needed on the bus. The bus may be equipped with memory read and write plus Input and output command lines.</div><br/><div>3) Now the command lines specifies whether the address refers to memory location or an I/O device.</div><br/><div>4) Most CPU uses memory mapped I/O.</div><br/><div>5) Always CPU assigns address to memory some of memory space is stolen and assigned to I/O device.</div><br/><div>6) It deals with fewer address lines.</div><br/><div><a href="http://k-developers.com/wp-content/uploads/2015/12/MEMORYMAPED.png"><img alt="MEMORYMAPED" class="size-full wp-image-102 aligncenter" height="318" src="http://k-developers.com/wp-content/uploads/2015/12/MEMORYMAPED.png" width="709" /></a></div><br/><div></div><br/><div><strong>3.Interrupt Driven I/O:-</strong></div><br/><div>1) In this method the program issues an I/O command and than continues to execute until it is interrupted by the I/O hardware to signal the end of I/O operation.</div><br/><div>2) Here the program enters a wait loop in which it repeatedly checks the device status. During this process the processor is not performing any useful computation.</div><br/><div>3) There are many situations where tasks can be performed while waiting for an I/O device to be ready, to allow this the I/O device should alert the processor when it becomes ready. It can be done by sending a hardware signal called an <strong>interrupt.</strong></div><br/><div>4) The routine executed in response to an interrupt request is called<strong> Interrupt Service Routine </strong>(ISR).</div><br/><div>5) The processor first completes execution of instruction then it loads the program counter(pc) with the address of first instruction of ISR.</div><br/><h3><strong>4.Direct Memory Access:-</strong></h3><br/><div>1) In this method the input and output devices read/write information from the main memory without interference of the CPU through the system bus.</div><br/><div>2) For I/O transfer, processor determines the status of I/O by:</div><br/><ul><br/> <li>Polling</li><br/> <li>Waiting for interrupt signal.</li><br/></ul><br/><div>3) Considerable Overhead is incurred in above I/O transfer processing.</div><br/><div>4) By DMA approach , large blocks of data at high speed can be sent between external device and main memory.</div><br/><div><strong>DMA CONTROLLER:-</strong></div><br/><div>1) It allows the data transfer between I/O device and memory.</div><br/><div>2) DMA controllers acts a processor but it is controlled by the CPU. To initiate the transfer of a block of words, the processor sends the following data to controller</div><br/><ul><br/> <li>Starting address of memory block</li><br/> <li>The word count</li><br/> <li>Control to specify the mode of transfer such as read or write.</li><br/> <li>A control to start the DMA transfer.</li><br/></ul><br/><div>3) The DMA controller performs the required I/O operation and send a interrupt to the processor upon completion.</div><br/><div></div><br/><div> <a href="http://k-developers.com/wp-content/uploads/2015/12/DMA.png"><img alt="DMA" class="size-full wp-image-103 aligncenter" height="377" src="http://k-developers.com/wp-content/uploads/2015/12/DMA.png" width="662" /></a></div><br/><h2><strong><span class="Apple-style-span">Use Of DMA controller in Computer System</span></strong></h2><br/><div><span class="Apple-style-span">1) DMA device have higher priority then processor over BUS control.</span></div><br/><div>2) Types of DMA Transfer:-</div><br/><ul><br/> <li>Cycle stealing</li><br/> <li>Burst mode</li><br/></ul><br/><div><strong>Cycle Stealing:-</strong></div><br/><div>DMA controller ‘steals’ memory cycles from the processor though processor originates most memory access.</div><br/><div><b>Burst</b><strong> mode:- </strong></div><br/><div>The DMA controller may be given exclusive access to the main memory to transfer a block of data without interruption.</div><br/><div><strong>Conflicts Of DMA</strong>:-</div><br/><ul><br/> <li>Conflict between processor and DMA</li><br/> <li>Two DMA Controller try to access the BUS at same time to access the main memory.</li><br/></ul><br/><br/><hr /><br/><br/> 

Computer Organisation I/O Organisation Input Output organisation

Accessing I/O Devices:- Most modern computers use single bus arrangement for connecting I/O devices to CPU & Memory. The bus enables...

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